1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and in particular to a semiconductor device having a thin film transistor and a method of manufacturing the same.
2. Description of the Background Art
As is known, TFTs (Thin Film Transistors) are a kind of semiconductor elements, and have been used in SRAMs and others. It is important for the SRAM that a power consumption is low and data can be held with a low voltage of 1.5 V or less. The TFTs have been employed for these purposes. FIG. 33 is a schematic cross section showing a conventional TFT. In the conventional TFT shown in FIG. 33, a polysilicon film 301 is provided at its predetermined regions with source/drain regions 301b, which are spaced from each other by a predetermined distance and are located at opposite sides of a channel region 301. A gate electrode 300 is formed on the channel region 301a with a gate oxide film 302 therebetween. The TFT is of a P-type if the TFT used in the SRAM has the above structure.
FIG. 34 is a graph showing I-V characteristics of a P-type TFT. Referring to FIG. 34, a current at a point A is a current of the TFT at the off state, and corresponds to a standby current of the SRAM. A current at a point B is a drain current of the TFT at the on state, and corresponds to a drain current of the SRAM while data is held thereby. The smaller the current at the point A is and the larger the current at the point B is, the higher performance the SRAM achieves. In the conventional TFT, however, the threshold voltage is liable to vary. If the threshold voltage of the TFT varies by -0.5 V, the current value lowers by one order of magnitude as shown in FIG. 34. As described above, there is a disadvantage that data cannot be held if the current of the turned-on TFT lowers.
A phenomenon in which the threshold voltage of TFT varies will be described below in detail. FIG. 35 is an equivalent circuit diagram showing a flip-flop circuit of the SRAM. FIG. 35 is an equivalent circuit diagram showing a flip-flop circuit of the SRAM. FIG. 36 is a graph showing variation of the I-V characteristics of the TFT under an H-state stress (indicated by (1)) and an L-state stress (indicated by (2)). Referring to FIGS. 35 and 36, the threshold voltage of the TFT varies upwardly, i.e., in an increasing direction, under the H-state stress (-BT stress). Thereby, the ON-current decreases, resulting in a disadvantage that the SRAM cannot hold data. The phenomenon in which the threshold voltage increases under the H-state stress is considered to be caused by the fact that, as shown in FIG. 37, Si--H of the TFT at a channel polysilicon side reacts on Si--O at a gate SiO.sub.2 side to produce OH which escapes, so that an interface level and fixed electric charges generate. This is specifically disclosed in 1993 Symposium on VLSI Technology 3B-3, pp 29-30.
Under the L-state stress, the threshold voltage of the TFT varies downwardly, i.e., in a decreasing direction, as shown in FIG. 36. As a result, the TFT changes into a depletion type. Therefore, the standby current of the SRAM increases, resulting in increase of a current consumption. It is considered that this phenomenon in which the threshold voltage decreases under the L-state stress is caused by electron trap due to electron injection near the drain region. The variation of the threshold voltage under the H-state stress is larger than that under the L-state stress.
As described above, the semiconductor device having the conventional TFTs suffers from various problems resulting from disadvantageous variation of the threshold voltage of the TFT.